Li-ion secondary batteries are often used in various portable electronic apparatuses that have been popular in recent years, such as cellular phones; digital cameras; small-size, light-weight audio apparatuses such as portable minidisk units; and game apparatuses. The Li-ion secondary battery involves the risk that metal Li deposits are formed to cause an accident when the battery is overcharged, and also has a problem in that the number of times of repeated charge and discharge use is reduced when the battery is overdischarged.
Accordingly, conventionally, two protection switches, one for overdischarge protection and the other for overcharge protection, are provided in the charge and discharge path between the secondary battery and an apparatus main body, and when the secondary battery is overcharged to be higher than or equal to a predetermined voltage or is overdischarged to be lower than or equal to a predetermined voltage, such overcharge or overdischarge is detected and a corresponding one of the protection switches is turned off, thereby preventing further overcharge or overdischarge.
Thus, the conventional charge and discharge protection circuit for a secondary battery requires a charge control MOSFET (Metal Oxide Silicon Field-Effect Transistor) for charge control and a discharge control MOSFET for discharge control as protection switches, and achieves charge and discharge protection for a battery pack by controlling the gate voltages of the charge control and discharge control MOSFETs. Further, conventionally, each of the charge control MOSFET and the discharge control MOSFET is a three-terminal IC, and the back gate potential is equal to the source potential. Accordingly, there is no need to control the back gate potential.
The source electrode of the charge control MOSFET is connected to the negative terminal of the battery pack, and the source electrode of the discharge control MOSFET is connected to the negative terminal of a battery cell. The direction of the parasitic diode of each MOSFET is fixed.
Japanese Laid-Open Patent Application No. 2006-121900 discloses a battery pack that employs the above-described two MOSFETs for charge control and discharge control.
FIG. 1 is a circuit diagram showing a battery pack 110 disclosed in Japanese Laid-Open Patent Application No. 2006-121900.
Referring to FIG. 1, the battery pack 110 includes a charge and discharge protection circuit 120, a discharge control FET Q1, a charge control FET Q2, a battery cell 112, capacitors C1, C2, and C3, and resistors r1 and r2.
The charge and discharge protection circuit 120 includes an overcharge detector circuit 122, an overdischarge detector circuit 127, an overcurrent detector circuit 125, delay circuits 126a and 126b, a level shifter 123, an abnormal charger detector circuit 128, a short circuit detector circuit 124, and n-type FETs Q3 and Q4.
The charge and discharge protection circuit 120 further includes a VDD terminal to which the positive terminal of the battery cell 112 is connected through the resistor r2, a VSS terminal to which the negative terminal of the battery cell 112 is connected, a V-terminal that detects discharge overcurrent and charge overcurrent, a Cout terminal that turns ON/OFF the charge control MOSFET Q2 that controls charge current, a Dout terminal that turns ON/OFF the discharge control MOSFET Q1 that controls discharge current, and a CT terminal for test shortening.
The Cout terminal and the Dout terminal are prevented from simultaneously turning OFF the discharge control MOSFET Q1 and the charge control MOSFET Q2. In an overcharged state or a charge overcurrent state, the output level of the Cout terminal output becomes LOW to turn OFF the charge control MOSFET Q2, thereby preventing charging, while the output level of the Dout terminal becomes HIGH to turn ON the discharge control MOSFET Q1, so that it is possible to perform discharge through the parasitic diode of the charge control MOSFET Q2.
Further, in an overdischarged state, a discharge overcurrent state, and a short-circuited state, the output level of the Dout terminal becomes LOW to turn OFF the discharge control MOSFET Q1, thereby preventing discharge, while the output level of the Cout terminal outputs becomes HIGH to turn ON the charge control MOSFET Q2, so that it is possible to perform charging through the parasitic diode of the discharge control MOSFET Q1.
According to the above-described conventional technique, it is possible to control charge and discharge separately, and the direction of the parasitic diode of each of the charge control and discharge control MOSFETs is fixed. Therefore, it is possible to provide protection relatively easily.
However, it is low-cost, space-saving products that are now sought after in the marketplace, and products lower in cost and greater in space-saving can be developed by forming a battery pack with one MOSFET capable of controlling both charge and discharge than with two conventional MOSFETs for control.